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SR-01 reg_format[1:0] == 2'h0; if (reg_format[1:0] == 2'h1) begin reg_format[1:0] = 2'h2; end else if (reg_format[1:0) == 2'h2) begin reg_format[1:0] = 2'h3; end else if (reg_format[1:0] == 2'h3) begin reg_format[1:0] = 2'h4; end else if (reg_format[1:0] == 2'h4) begin reg_format[1:0] = 2'h5; end else if (reg_format[1:0] == 2'h5) begin reg_format[1:0] = 2'h6; end if (reg_format[1:0] == 2'h6) begin reg_format[1:0] = 2'h7; end else if (reg_format[1:0] == 2'h7) begin reg_format[1:0] = 2'h8; end else if (reg_format[1:0] == 2'h8) begin reg_format[1:0] = 2'h9; end else if (reg_format[1:0] == 2'h9) begin reg_format[1:0] = 2'h10; end else if (reg_format[1:0] == 2'h10) begin reg_format[1:0] = 2'h11; end else if (reg_format[1:0] == 2'h11) begin reg_format[1:0] = 2'h12; end else if (reg_format[1:0] == 2'h12) begin reg_format[1:0] = 2'h13; end else if (reg_format[1:0] == 2'h13) begin reg_format[1:0] = 2'h14; end else if (reg_format[1:0] == 2'h14) begin reg_format[1:0] = 2'h15; end else if (reg_format[1:0] == 2'h15) begin reg_format[1:0] = 2'h16; end else if (reg_format[1:0] == 2'h16) begin reg_format[1:0] = 2'h17; end else if (reg_format[1:0] == 2(h[1:0] == 2'h17) begin reg_format[1:0] = 2'h18; end else if (reg_format[1:0] == 2'h18) begin reg_format[1:0] = 2'h19; end else if (reg_format[1:0] == 2'h19) begin reg_format[1:0] = 2'h20; end else if (reg_format[1:0] == 2_h20) begin reg_format[1:0] = 3'h21; end else if (reg_format[1:0] == 2'h21) begin reg_format[1:0] = 3'h22; end else if (reg_format[1:0] == 2_h22) begin reg_format[1:0] = 2'h23; end else if (reg_format[1:0] == 2_h23) begin reg_format[1:0] = 2_h24; end else if (reg_format[1:0] == 2_h24) begin reg_format[1:0] = 2_h25; end else if (reg_format[1:0] == 2_h25) begin reg_format[1:0] = 2_h26; end else if (reg_format[1:0] == 2_h26) begin reg_format[1:0] = 2_h27; end else if (reg_format[1:0] == 2_h27) begin reg_format[1:0]

25 Jun, 202062 mins